1. Field of Invention
The present invention relates to two dimensional stacking of integrated circuit packages. More particularly, the present invention relates to two dimensional stacking of integrated circuit packages using interposers.
2. Description of Related Art
Demands for high-density boards in microprocessor systems have created many challenges to the board assembly process. Three dimensional stacking of integrated circuit devices were introduced to stack multiple devices on top of each other on the printed circuit board to save horizontal board space. Among several three dimensional stacking method, many attempts to reduce the gap between the devices to minimize the height of the stacked configuration. Take the stacking of thin small outline packages (TSOP) as an example, to reduce the height of stack, interposers were used as contact members. Please refer to FIG. 1, illustrating a three dimensional stacked device 100 with interposers 110. The interposers 110 are located between the individual packages leads 120. This configuration is an improvement from inserting a single slab of printed circuit board in between the packages introducing extra height to the stack.
However, the profile of the circuit modules using three dimensional stacking with interposers is still too thick for the thinner-is-better consumer market today. Modules such as multi media cards (MMC) and secure digital (SC) cards demands a reduction in thickness, yet without expansion in the horizontal space. Unless the profile of the integrated circuit packages can be reduced, the height of three dimensional stacking cannot be reduced significantly even if no gap exists between the packages.
Therefore, a new stacking model is needed to significantly reduce the profile of the circuit modules, such as MMC and SD cards, while maintaining the same horizontal board space of the modules.